/**
 * @file:          stspin32g4.c
 * @brief:
 * @details:
 * @author:        wjh
 * @date created:  2025.07.20
 * @version:       1.0.0
 * @par copyright (c):
 *
 * @par history (desc):
 *   version:1.0.0, wjh, 2025.07.20,03:30:31
 */

/* Include Files **************************************************************/
#include "stspin32g4.h"
#include "main.h"
#include "atomic_delay.h"
#include "i2c.h"

/* Global Variable Define *****************************************************/

/* Function Define ************************************************************/

uint8_t receive_data[2] = {0};
void Stspin32g4_Init(struct Stspin32g4 *self)
{
    self->WriteReg = Stspin32g4_WriteReg;
    self->ReadReg = Stspin32g4_ReadReg;
    self->ReadAllReg = Stspin32g4_ReadAllReg;
    self->WriteConfig = Stspin32g4_WriteConfig;
    self->Cmd_Reset = Stspin32g4_Cmd_Reset;
    self->Cmd_LowConsumptionMode = Stspin32g4_Cmd_LowConsumptionMode;
    self->Cmd_FaultClear = Stspin32g4_Cmd_FaultClear;
    self->Cmd_LockControl = Stspin32g4_Cmd_LockControl;

    /* init */
    self->Cmd_LockControl(self, 0);
    self->WriteConfig(self);
    self->Cmd_FaultClear(self);
    self->Cmd_LockControl(self, 1);
    self->ReadAllReg(self);

    /* init device */
}

void Stspin32g4_WriteReg(struct Stspin32g4 *self, uint8_t reg_addr, uint8_t write_data)
{
    uint8_t write_buff = write_data;
    HAL_I2C_Mem_Write(&hi2c3, self->param_i2c_addr, reg_addr, I2C_MEMADD_SIZE_8BIT, &write_buff, 1, STSPIN32G4_I2C_DELAY_MS);
}

uint8_t Stspin32g4_ReadReg(struct Stspin32g4 *self, uint8_t reg_addr)
{
    uint8_t read_data = 0;

    HAL_I2C_Mem_Read(&hi2c3, self->param_i2c_addr, reg_addr, I2C_MEMADD_SIZE_8BIT, &read_data, 1, STSPIN32G4_I2C_DELAY_MS);

    return read_data;
}

void Stspin32g4_ReadAllReg(struct Stspin32g4 *self)
{
    HAL_I2C_Mem_Read(&hi2c3, self->param_i2c_addr, STSPIN32G4_REG_ADDR_POWMNG, I2C_MEMADD_SIZE_8BIT, (uint8_t *)&self->reg.POWMNG, 1, STSPIN32G4_I2C_DELAY_MS);
    HAL_I2C_Mem_Read(&hi2c3, self->param_i2c_addr, STSPIN32G4_REG_ADDR_LOGIC, I2C_MEMADD_SIZE_8BIT, (uint8_t *)&self->reg.LOGIC, 1, STSPIN32G4_I2C_DELAY_MS);
    HAL_I2C_Mem_Read(&hi2c3, self->param_i2c_addr, STSPIN32G4_REG_ADDR_READY, I2C_MEMADD_SIZE_8BIT, (uint8_t *)&self->reg.READY, 1, STSPIN32G4_I2C_DELAY_MS);
    HAL_I2C_Mem_Read(&hi2c3, self->param_i2c_addr, STSPIN32G4_REG_ADDR_NFAULT, I2C_MEMADD_SIZE_8BIT, (uint8_t *)&self->reg.NFAULT, 1, STSPIN32G4_I2C_DELAY_MS);
    HAL_I2C_Mem_Read(&hi2c3, self->param_i2c_addr, STSPIN32G4_REG_ADDR_CLEAR, I2C_MEMADD_SIZE_8BIT, (uint8_t *)&self->reg.CLEAR, 1, STSPIN32G4_I2C_DELAY_MS);
    HAL_I2C_Mem_Read(&hi2c3, self->param_i2c_addr, STSPIN32G4_REG_ADDR_STBY, I2C_MEMADD_SIZE_8BIT, (uint8_t *)&self->reg.STBY, 1, STSPIN32G4_I2C_DELAY_MS);
    HAL_I2C_Mem_Read(&hi2c3, self->param_i2c_addr, STSPIN32G4_REG_ADDR_LOCK, I2C_MEMADD_SIZE_8BIT, (uint8_t *)&self->reg.LOCK, 1, STSPIN32G4_I2C_DELAY_MS);
    HAL_I2C_Mem_Read(&hi2c3, self->param_i2c_addr, STSPIN32G4_REG_ADDR_RESET, I2C_MEMADD_SIZE_8BIT, (uint8_t *)&self->reg.RESET, 1, STSPIN32G4_I2C_DELAY_MS);
    HAL_I2C_Mem_Read(&hi2c3, self->param_i2c_addr, STSPIN32G4_REG_ADDR_STATUS, I2C_MEMADD_SIZE_8BIT, (uint8_t *)&self->reg.STATUS, 1, STSPIN32G4_I2C_DELAY_MS);
}

void Stspin32g4_WriteConfig(struct Stspin32g4 *self)
{
    HAL_I2C_Mem_Write(&hi2c3, self->param_i2c_addr, STSPIN32G4_REG_ADDR_POWMNG, I2C_MEMADD_SIZE_8BIT, (uint8_t *)&self->param_reg_config.POWMNG, 1, STSPIN32G4_I2C_DELAY_MS);
    HAL_I2C_Mem_Write(&hi2c3, self->param_i2c_addr, STSPIN32G4_REG_ADDR_LOGIC, I2C_MEMADD_SIZE_8BIT, (uint8_t *)&self->param_reg_config.LOGIC, 1, STSPIN32G4_I2C_DELAY_MS);
    HAL_I2C_Mem_Write(&hi2c3, self->param_i2c_addr, STSPIN32G4_REG_ADDR_READY, I2C_MEMADD_SIZE_8BIT, (uint8_t *)&self->param_reg_config.READY, 1, STSPIN32G4_I2C_DELAY_MS);
    HAL_I2C_Mem_Write(&hi2c3, self->param_i2c_addr, STSPIN32G4_REG_ADDR_NFAULT, I2C_MEMADD_SIZE_8BIT, (uint8_t *)&self->param_reg_config.NFAULT, 1, STSPIN32G4_I2C_DELAY_MS);
    // HAL_I2C_Mem_Write(&hi2c3, self->param_i2c_addr, STSPIN32G4_REG_ADDR_CLEAR, I2C_MEMADD_SIZE_8BIT, &self->reg.CLEAR.all, 1, STSPIN32G4_I2C_DELAY_MS);
    // HAL_I2C_Mem_Write(&hi2c3, self->param_i2c_addr, STSPIN32G4_REG_ADDR_STBY, I2C_MEMADD_SIZE_8BIT, &self->reg.STBY.all, 1, STSPIN32G4_I2C_DELAY_MS);
    // HAL_I2C_Mem_Write(&hi2c3, self->param_i2c_addr, STSPIN32G4_REG_ADDR_LOCK, I2C_MEMADD_SIZE_8BIT, &self->reg.LOCK.all, 1, STSPIN32G4_I2C_DELAY_MS);
    // HAL_I2C_Mem_Write(&hi2c3, self->param_i2c_addr, STSPIN32G4_REG_ADDR_RESET, I2C_MEMADD_SIZE_8BIT, &self->reg.RESET.all, 1, STSPIN32G4_I2C_DELAY_MS);
    // HAL_I2C_Mem_Write(&hi2c3, self->param_i2c_addr, STSPIN32G4_REG_ADDR_STATUS, I2C_MEMADD_SIZE_8BIT, &self->reg.STATUS.all, 1, STSPIN32G4_I2C_DELAY_MS);
}

void Stspin32g4_Cmd_Reset(struct Stspin32g4 *self)
{
    uint8_t write_data = 0xff;
    HAL_I2C_Mem_Write(&hi2c3, self->param_i2c_addr, STSPIN32G4_REG_ADDR_RESET, I2C_MEMADD_SIZE_8BIT, &write_data, 1, STSPIN32G4_I2C_DELAY_MS);
}

void Stspin32g4_Cmd_LowConsumptionMode(struct Stspin32g4 *self, uint8_t enter)
{
    uint8_t write_data;
    write_data = enter != 0 ? 0x01 : 0x00;
    HAL_I2C_Mem_Write(&hi2c3, self->param_i2c_addr, STSPIN32G4_REG_ADDR_STBY, I2C_MEMADD_SIZE_8BIT, &write_data, 1, STSPIN32G4_I2C_DELAY_MS);
}

void Stspin32g4_Cmd_FaultClear(struct Stspin32g4 *self)
{
    uint8_t write_data = 0xff;
    HAL_I2C_Mem_Write(&hi2c3, self->param_i2c_addr, STSPIN32G4_REG_ADDR_CLEAR, I2C_MEMADD_SIZE_8BIT, &write_data, 1, STSPIN32G4_I2C_DELAY_MS);
}

void Stspin32g4_Cmd_LockControl(struct Stspin32g4 *self, uint8_t lock)
{
    uint8_t write_data;
    write_data = lock != 0 ? 0x00 : 0xa5;
    HAL_I2C_Mem_Write(&hi2c3, self->param_i2c_addr, STSPIN32G4_REG_ADDR_LOCK, I2C_MEMADD_SIZE_8BIT, &write_data, 1, STSPIN32G4_I2C_DELAY_MS);
}